The SD/HD set-top box decoder is designed for decoding of TV signals of satellite, terrestrial and cable broadcasting. It also supports IP TV with the use of the latest audio and video compression technologies. This well designed component is also suitable for other digital multimedia devices.
- 324MHz ARM1176JZF-S.
- Instruction cache: 16KB.
- Data cache: 16KB.
- Scratch-pad memory TCM: 16KB for instructions and data.
- Trace and debug ETM11CS unit.
- Up to 8 DMA channels
- Internal memory: 8-Mbit video.
- SD/HD video decoder under standards MPEG-2/H.264/VC-1.
- 2D graphical accelerator.
- Video scaler.
- Video output for connection of peripherals.
- HDMI transmitter with HDCP function.
- Video controller with function of translucent graphic layer and video scaler support interfaces.
- USB2.0 high speed host controller (up to 480Mbit/s).
- Ethernet MAC 10/100 base T controller.
- Interface I2S - 3 channels, 2 external, 1 internal.
- 3 UART interfaces.
- 2 SPI interfaces.
- T0 and T1 specification smart card interface.
- GPIO: to 82 channels.
- Transport stream demultiplexer with hardware section filters and a filtering to 128 PID.
- Two DDR2 SDRAM controllers with 16-bit external buses.
- NAND flash support.
- Serial NOR flash support.
- 2 timers, watchdog timer technical parameters.
- Package type: PBGA-544.
- Supply voltage: 1.2V – integrated circuit core, 1.8V – interfaces DDR2, 3.3V – peripheral devices.
- Audio: DSP NeuroMatrix® NMC3 for audio decoding and processing.
- Software decoding of the various audio standards.
- 8-channel audio processor.
- I2S and S/PDIF interfaces conditional access and information security system.
- DVB-CI interface.
- Crypto processor with AES and 3DES algorithms support.
- DVB-CSA descrambling integrated hardware unit.
- One-time-programmable (OTP) memory for storage of integrated circuit unique ID and the key information.
- Mechanism of loaded image spoofing protection.